diff --git a/.github/ISSUE_TEMPLATE/bug_report.md b/.github/ISSUE_TEMPLATE/bug_report.md index 0b199b66..06ea7476 100644 --- a/.github/ISSUE_TEMPLATE/bug_report.md +++ b/.github/ISSUE_TEMPLATE/bug_report.md @@ -21,8 +21,7 @@ useful for layout problems in the PDF or HTML pages. **Our commitment** -We will work to solve the bug report in time for the upcoming -release. However, we would like to encourage you to submit the fix -yourself, if possible. If you intend to do so and this is your first -contribution, we recommend reading our [contribution -guidelines](https://github.com/ARM-software/acle/blob/main/CONTRIBUTING.md). +We will review the reported bug and prioritize it with other project work. +However, you can also submit a fix. If you intend to do so and this is your +first contribution, we recommend reading our +[contribution guidelines](https://github.com/ARM-software/acle/blob/main/CONTRIBUTING.md). diff --git a/.github/PULL_REQUEST_TEMPLATE.md b/.github/PULL_REQUEST_TEMPLATE.md index 5859c7e7..b1a74c14 100644 --- a/.github/PULL_REQUEST_TEMPLATE.md +++ b/.github/PULL_REQUEST_TEMPLATE.md @@ -50,12 +50,11 @@ Checklist: (mark with ``X`` those which apply) patch will be automatically checked in the Actions of the pull request. * [ ] I have added an item that describes the changes I have - introduced in this PR in the section **Changes for next - release** of the section **Change Control**/**Document history** - of the document. Create **Changes for next release** if it does - not exist. Notice that changes that are not modifying the - content and rendering of the specifications (both HTML and PDF) - do not need to be listed. + introduced in this PR in section **Changelog for year 20xx** (this year) + of section **Preface**/**About this document**. + Create **Changelog for year 20xx** if it does not exist. Notice that + changes that are not modifying the content and rendering of the + specifications (both HTML and PDF) do not need to be listed. * [ ] When modifying content and/or its rendering, I have checked the correctness of the result in the PDF output (please refer to the instructions on [how to build the PDFs diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md index bd641d4e..805b708e 100644 --- a/CONTRIBUTING.md +++ b/CONTRIBUTING.md @@ -8,12 +8,11 @@ title: Contribution Guidelines # Thank you for considering contributing! -Contributions are always welcome. We accept [bug fixes](#bugs), -[proposals and new ideas](#proposals-for-new-content), or simply [editorial -improvements](#editorial-improvements). +Contributions are always welcome. We accept bug fixes, proposals and new ideas, +or simply editorial improvements. By submitting a pull request you are implicitly adhering to the -[contribution agreement](#contribution-agreement) +contribution agreement below. ## Bugs @@ -52,36 +51,23 @@ the specifications and stores them in the folder `pdfs`. # Continuous integration -The continuous integration bot executes the script: - -``` - ./build_with_docker.sh -``` - -PDFs are generated automatically in response to a pull request. You -can download the PDFs in the `Actions` tab of any pull request. +The continuous integration bot executes the script and generates PDFs +automatically in response to a pull request. You can download the PDFs in the +`Actions` tab of any pull request. An additional step uses [``markdown-link-check```](https://github.com/tcort/markdown-link-check) to check that all the links in the markdown files are resolving correctly. -# Branches and pull requests. - -The branch `latest-release` is the release branch, which contains the -code used to build the PDFs of the [latest official -release](https://github.com/ARM-software/acle/releases/latest). The -branch `latest-release` is also used to build the [website of the ACLE -project](https://arm-software.github.io/acle). +# Branches and pull requests -New development (bug-fixes, proposals, extensions, and so on) is -committed on the `main` branch. Therefore, please submit your -PR against the branch `main`. +Use branch `main` for bug fixes, proposals, extensions, and other development +work. Submit all pull requests against `main`. -It is good practice to track changes. In the section `Changes for next -release`, please list any changes that you have made to the -document. For an example, see [this -PR](https://github.com/ARM-software/acle/pull/19). +It is good practice to track changes. In section `Changelog for year 20xx`, +please list any changes that you have made to the document. As an example, see +[this PR](https://github.com/ARM-software/acle/pull/443/changes). # Contribution agreement diff --git a/README.md b/README.md index d261e466..7e0feb7f 100644 --- a/README.md +++ b/README.md @@ -15,16 +15,29 @@ This repository contains the source material from which the specifications for the Arm C Language Extensions (ACLE) are derived. -The latest release of the specifications can be browsed online at -[arm-software.github.io/acle/](https://arm-software.github.io/acle/). +Browse the current specifications on the +[ACLE website](https://arm-software.github.io/acle/). -The PDF version of the documents can be retrieved from the [latest -release](https://github.com/ARM-software/acle/releases/latest) page. +## Versioning -The development version is stored on the branch `main` at -[github.com/ARM-software/acle/](https://github.com/ARM-software/acle/), -while the latest released version is tracked by the branch -`latest-release`. +Arm no longer publishes quarterly specification releases. We publish the current +specification after each reviewed change merges into branch `main`. This +process gives users earlier access to new features, clarifications, and +corrections. + +The PDF version of the documents can be retrieved from the +[releases](https://github.com/ARM-software/acle/releases) page. + +Branch `main` contains the current ACLE specification and ongoing development. + +## Legacy releases + +The [releases](https://github.com/ARM-software/acle/releases) page also contains +the legacy quarterly releases through 2026Q1. + +Pre-GitHub versions of the documents were previously released on +[Arm Developer](https://developer.arm.com), and are also hosted in this +repository, in [Legacy releases](legacyreleases/README.md). ## Contributing @@ -43,19 +56,18 @@ an email to arm.acle@arm.com. ## List of documents -HTML version | PDF version ---- | --- -[Arm C Language Extensions](https://arm-software.github.io/acle/main/) | [download](https://github.com/ARM-software/acle/releases/latest) -[Morello Supplement to the Arm C Language Extensions](https://arm-software.github.io/acle/morello/) | [download](https://github.com/ARM-software/acle/releases/latest) -[Arm MVE Intrinsics](https://arm-software.github.io/acle/mve_intrinsics/) | [download](https://github.com/ARM-software/acle/releases/latest) -[Arm Neon Intrinsics Reference](https://arm-software.github.io/acle/neon_intrinsics/) | [download](https://github.com/ARM-software/acle/releases/latest) -[Arm®v8-M Security Extensions - Requirements on Development Tools](https://arm-software.github.io/acle/cmse/) | [download](https://github.com/ARM-software/acle/releases/latest) +[Arm C Language Extensions](https://arm-software.github.io/acle/main/) -## Legacy releases +[Morello Supplement to the Arm C Language Extensions](https://arm-software.github.io/acle/morello/) + +[Arm MVE Intrinsics](https://arm-software.github.io/acle/mve_intrinsics/) + +[Arm Neon Intrinsics Reference](https://arm-software.github.io/acle/neon_intrinsics/) + +[Arm®v8-M Security Extensions - Requirements on Development Tools](https://arm-software.github.io/acle/cmse/) -Legacy versions of the documents were released on [Arm Developer](https://developer.arm.com). -They are now also hosted in this repository and are to be found in [Legacy releases](legacyreleases/README.md). -They follow the same folder naming scheme as the main document folders. +The PDF versions can be found in the latest GitHub +[release](https://github.com/ARM-software/acle/releases/latest). # License diff --git a/main/acle.md b/main/acle.md index 2496db92..b25126c2 100644 --- a/main/acle.md +++ b/main/acle.md @@ -1,6 +1,5 @@ --- title: Arm C Language Extensions -date-of-issue: 15 May 2026 # LaTeX specific variables copyright-text: "Copyright: see section \\texorpdfstring{\\nameref{copyright}}{Copyright}." # Jekyll specific variables @@ -117,9 +116,7 @@ about Arm’s trademarks. ## About this document -### Change control - -#### Current Status and Anticipated Changes +### Support levels The following support level definitions are used by the ACLE specifications: @@ -151,7 +148,40 @@ specifications: All content in this document is at the **Release** quality level, unless a different support level is specified in the text. -#### Change history +### Continuously updated specification + +After 2026Q1, this specification is published continuously from the +main branch. Each published version is identified by its Git commit hash. + +See [Changelog for year 2026](#changelog-for-year-2026). + +### Changelog for year 2026 + +* Added [**Alpha**](#support-levels) + support for SVE2.3 (FEAT_SVE2p3), SME2.3 (FEAT_SME2p3), FEAT_F16F32DOT + dot product intrinsics. +* Added [**Alpha**](#support-levels) + support for FEAT_F16F32MM, FEAT_F16MM and FEAT_SVE_B16MM mmla intrinsics. +* Added [**Alpha**](#support-levels) + support for SVE2.3 (FEAT_SVE2p3) and SME2.3 lookup table intrinsics. +* Added [**Alpha**](#support-levels) + support for SVE2.3 (FEAT_SVE2p3) and SME2.3 pairwise operation intrinsics. +* Added [**Alpha**](#support-levels) + support for SVE2.3 (FEAT_SVE2p3) and SME2.3 conversion intrinsics. +* Added [**Alpha**](#support-levels) + support for SVE2.3 (FEAT_SVE2p3) and SME2.3 absolute difference accumulation + intrinsics. +* Added [**Alpha**](#support-levels) + support for SVE2.3 (FEAT_SVE2p3) and SME2.3 shift right narrow intrinsics. +* Bumped armv9.6 intrinsics implementation to [**Beta**](#support-levels) +* Added support for producer-consumer data placement hints. +* Clarified interaction between SME keyword attributes and a common compiler + extension whereby type attributes can be inherited between subsequent + duplicate decls. + +### Legacy changelog + +The changes between legacy releases were as follows: | **Issue** | **Date** | **By** | **Change** | | ------------ | ----------------- | ------ | -------------------------------------------------------------------------------------------------------------------- | @@ -281,8 +311,7 @@ Armv8.4-A [[ARMARMv84]](#ARMARMv84). Support is added for the Dot Product intrin * In [Data types](#data-types), clarified that `__fp16` and `__bf16` are predefined types whereas vector types like `int32x4_t` are not. * Moved the [Future directions](#future-directions) chapter to the end. -* Added a description of support levels in [Current Status and - Anticipated Changes](#current-status-and-anticipated-changes). +* Added a description of #support-levels. * Support added for [Function Multi Versioning](#function-multi-versioning). * The sections [AES extension](#aes-extension), [SHA2 extension](#sha2-extension) and [SHA512 @@ -290,8 +319,7 @@ Armv8.4-A [[ARMARMv84]](#ARMARMv84). Support is added for the Dot Product intrin specifying the `FEAT_*` tag they refer to from the Arm Architectural Reference Manual. * Sorted the items in [References](#references). -* Changed the wording of **Beta** in [Current Status and Anticipated - Changes](#current-status-and-anticipated-changes). +* Changed the wording of **Beta** in #support-levels. * Sorted the table in [Terms and abbreviations](#terms-and-abbreviations). * Formatted `memcpy`, `memmove` and `memset` with fixed-width font all throughout the document. @@ -304,7 +332,7 @@ Armv8.4-A [[ARMARMv84]](#ARMARMv84). Support is added for the Dot Product intrin bulleted list for the examples. No functional change intended. -* Reordered the sections in [Change history](#change-history) in +* Reordered the sections in [Legacy changelog](#legacy-changelog) in chronological order. #### Changes between ACLE Q1 2022 and ACLE Q2 2022 @@ -322,7 +350,7 @@ Armv8.4-A [[ARMARMv84]](#ARMARMv84). Support is added for the Dot Product intrin #### Changes between ACLE Q2 2022 and ACLE Q4 2022 -* Added [**Alpha**](#current-status-and-anticipated-changes) +* Added [**Alpha**](#support-levels) [support for SME](#arm_sme.h). * Added feature detection macro `__ARM_FEATURE_RCPC` for RCpc (Release Consistent processor consistent) model at [RCpc](#rcpc). * Added two new valid values to the @@ -394,7 +422,7 @@ Armv8.4-A [[ARMARMv84]](#ARMARMv84). Support is added for the Dot Product intrin #### Changes between ACLE Q1 2024 and ACLE Q2 2024 * Added new content for the handling of arguments in CMSE Entry functions and return values of CMSE Non-secure calls in order to address security issues. -* Added [**Alpha**](#current-status-and-anticipated-changes) +* Added [**Alpha**](#support-levels) support for SVE2.1 (FEAT_SVE2p1). #### Changes between ACLE Q2 2024 and ACLE Q3 2024 @@ -405,14 +433,14 @@ Armv8.4-A [[ARMARMv84]](#ARMARMv84). Support is added for the Dot Product intrin level of the [Function Multi Versioning](#function-multi-versioning). * Unified Function Multi Versioning features sha1 and sha2. * Unified Function Multi Versioning features ls64, ls64_v, and ls64_accdata. -* Added [**Alpha**](#current-status-and-anticipated-changes) +* Added [**Alpha**](#support-levels) support for SME2.1 (FEAT_SME2p1). * Removed requirement to add preprocessor guards for header files. * Added specifications for floating-point absolute minimum and maximum intrinsics (FEAT_FAMINMAX). * Added specifications for table lookup intrinsics (FEAT_LUT, FEAT_SME_LUTv2). * Added Release support level for the [Custom Datapath Extension](#custom-datapath-extension). -* Added [**Alpha**](#current-status-and-anticipated-changes) +* Added [**Alpha**](#support-levels) support for modal 8-bit floating point intrinsics. #### Changes between ACLE Q3 2024 and ACLE Q4 2024 @@ -445,19 +473,19 @@ Armv8.4-A [[ARMARMv84]](#ARMARMv84). Support is added for the Dot Product intrin * Added mf8 variants of SME 2.1 intrinsics. * Added `svdot[_n_f16_mf8]_fpm` and `svdot[_n_f32_mf8]_fpm`. * Added Guarded Control Stack (GCS) at - [**Beta**](#current-status-and-anticipated-changes) quality level. + [**Beta**](#support-levels) quality level. #### Changes between ACLE Q4 2024 and ACLE Q2 2025 * Changed the Function Multi Versioning default version rules to be more explicit. -* Added [**Alpha**](#current-status-and-anticipated-changes) support +* Added [**Alpha**](#support-levels) support for structured sparsity outer product intrinsics -* Added [**Alpha**](#current-status-and-anticipated-changes) support +* Added [**Alpha**](#support-levels) support for quarter-tile outer product intrinsics. * Removed the priority column from the mapping tables of Function Multi Versioning. * Added Function Multi Versioning feature cssc. * Added feature test macro for FEAT_SSVE_BitPerm. -* Upgrade to [**Beta**](#current-status-and-anticipated-changes) +* Upgrade to [**Beta**](#support-levels) support for modal 8-bit floating point intrinsics. #### Changes between ACLE Q2 2025 and ACLE Q3 2025 @@ -476,42 +504,18 @@ Armv8.4-A [[ARMARMv84]](#ARMARMv84). Support is added for the Dot Product intrin * Improved documentation for VMLA/VMLS intrinsics for floats. * Added support for producer-consumer data placement hints. * Added support for range prefetch intrinsic and `__ARM_PREFETCH_RANGE` macro. -* Added [**Alpha**](#current-status-and-anticipated-changes) +* Added [**Alpha**](#support-levels) support for SVE2.2 (FEAT_SVE2p2) -* Added [**Alpha**](#current-status-and-anticipated-changes) +* Added [**Alpha**](#support-levels) support for SME2.2 (FEAT_SME2p2). -* Added [**Alpha**](#current-status-and-anticipated-changes) support +* Added [**Alpha**](#support-levels) support for FEAT_SVE_AES2, FEAT_SSVE_AES intrinsics. * Added support for FEAT_FPRCVT intrinsics and `__ARM_FEATURE_FPRCVT`. * Removed all references to Transactional Memory Extension (TME). -* Added [**Alpha**](#current-status-and-anticipated-changes) support +* Added [**Alpha**](#support-levels) support for Brain 16-bit floating-point vector multiplication intrinsics. * Redesigned atomic store with hints intrinsics. -#### Changes after ACLE Q1 2026 - -* Added [**Alpha**](#current-status-and-anticipated-changes) - support for SVE2.3 (FEAT_SVE2p3), SME2.3 (FEAT_SME2p3), FEAT_F16F32DOT - dot product intrinsics. -* Added [**Alpha**](#current-status-and-anticipated-changes) - support for FEAT_F16F32MM, FEAT_F16MM and FEAT_SVE_B16MM mmla intrinsics. -* Added [**Alpha**](#current-status-and-anticipated-changes) - support for SVE2.3 (FEAT_SVE2p3) and SME2.3 lookup table intrinsics. -* Added [**Alpha**](#current-status-and-anticipated-changes) - support for SVE2.3 (FEAT_SVE2p3) and SME2.3 pairwise operation intrinsics. -* Added [**Alpha**](#current-status-and-anticipated-changes) - support for SVE2.3 (FEAT_SVE2p3) and SME2.3 conversion intrinsics. -* Added [**Alpha**](#current-status-and-anticipated-changes) - support for SVE2.3 (FEAT_SVE2p3) and SME2.3 absolute difference accumulation - intrinsics. -* Added [**Alpha**](#current-status-and-anticipated-changes) - support for SVE2.3 (FEAT_SVE2p3) and SME2.3 shift right narrow intrinsics. -* Bumped armv9.6 intrinsics implementation to [**Beta**](#current-status-and-anticipated-changes) -* Added support for producer-consumer data placement hints. -* Clarified interaction between SME keyword attributes and a common compiler - extension whereby type attributes can be inherited between subsequent - duplicate decls. - ### References This document refers to the following documents. @@ -886,7 +890,7 @@ start with the prefix `__ARM`. ## Keyword attributes This section is in -[**Beta** state](#current-status-and-anticipated-changes) and might change or be +[**Beta** state](#support-levels) and might change or be extended in the future. ACLE adds several non-standard keywords to C and C++. These keywords @@ -1172,7 +1176,7 @@ header: ### `` The specification for SME is in -[**Beta** state](#current-status-and-anticipated-changes) and may +[**Beta** state](#support-levels) and may change or be extended in the future. `` declares functions and defines intrinsics for SME @@ -2044,9 +2048,9 @@ header file is available. #### Scalable Matrix Extension (SME) The specification for SME2.1 is in -[**Beta** state](#current-status-and-anticipated-changes) and the +[**Beta** state](#support-levels) and the specification for the rest of SME is in -[**Beta** state](#current-status-and-anticipated-changes). The +[**Beta** state](#support-levels). The specifications may change or be extended in the future. ACLE provides [features](#sme-language-extensions-and-intrinsics) @@ -2124,7 +2128,7 @@ defined to a nonzero value. #### Half-precision floating-point SME intrinsics The specification for SME2.1 is in -[**Beta** state](#current-status-and-anticipated-changes) and might change or be +[**Beta** state](#support-levels) and might change or be extended in the future. `__ARM_FEATURE_SME_F16F16` is defined to `1` if there is hardware support @@ -2159,7 +2163,7 @@ of half-precision brain floating-point types. #### Non-widening brain 16-bit floating-point support The specification for B16B16 is in -[**Alpha** state](#current-status-and-anticipated-changes) and might change or be +[**Alpha** state](#support-levels) and might change or be extended in the future. `__ARM_FEATURE_SVE_B16B16` is defined to `1` if there is hardware support @@ -2185,7 +2189,7 @@ are available. #### Brain 16-bit floating-point vector multiplication support This section is in -[**Beta** state](#current-status-and-anticipated-changes) and might change or be +[**Beta** state](#support-levels) and might change or be extended in the future. `__ARM_FEATURE_SVE_BFSCALE` is defined to `1` if there is hardware @@ -2199,7 +2203,7 @@ of half-precision brain floating-point types. #### Brain 16-bit floating-point matrix multiplication support This section is in -[**Alpha** state](#current-status-and-anticipated-changes) and might change or be +[**Alpha** state](#support-levels) and might change or be extended in the future. `__ARM_FEATURE_SVE_B16MM` is defined to `1` if there is hardware @@ -2244,7 +2248,7 @@ SVE AES2 (FEAT_SVE_AES2) instructions in Streaming SVE mode (FEAT_SSVE_AES) and if the associated ACLE intrinsics are available. The specification for SVE AES2 (FEAT_SVE_AES2, FEAT_SSVE_AES) instructions is in -[**Beta** state](#current-status-and-anticipated-changes) and might change or be +[**Beta** state](#support-levels) and might change or be extended in the future. #### SHA2 extension @@ -2431,7 +2435,7 @@ this implies: #### Half-precision to single-precision dot product extension This section is in -[**Alpha** state](#current-status-and-anticipated-changes) and might change or be +[**Alpha** state](#support-levels) and might change or be extended in the future. `__ARM_FEATURE_F16F32DOT` is defined if the half-precision dot product @@ -2468,7 +2472,7 @@ associated ACLE intrinsics are available. This implies that ##### Multiplication of modal 8-bit floating-point matrices This section is in -[**Beta** state](#current-status-and-anticipated-changes) and might change or be +[**Beta** state](#support-levels) and might change or be extended in the future. `__ARM_FEATURE_F8F16MM` is defined to `1` if there is hardware support @@ -2488,7 +2492,7 @@ for the SVE 16-bit floating-point to 32-bit floating-point matrix multiply and a ##### Multiplication of 16-bit floating-point matrices (AdvSIMD) This section is in -[**Alpha** state](#current-status-and-anticipated-changes) and might change or be +[**Alpha** state](#support-levels) and might change or be extended in the future. `__ARM_FEATURE_F16F32MM` is defined if the Neon half-precision matrix multiply @@ -2533,7 +2537,7 @@ the SVE2 bit permute instructions in Streaming SVE mode (FEAT_SSVE_BitPerm) and #### 16-bit to 64-bit integer widening outer product intrinsics The specification for SME is in -[**Beta** state](#current-status-and-anticipated-changes) and might change or be +[**Beta** state](#support-levels) and might change or be extended in the future. `__ARM_FEATURE_SME_I16I64` is defined to `1` if there is hardware @@ -2544,7 +2548,7 @@ available. This implies that `__ARM_FEATURE_SME` is nonzero. #### Double precision floating-point outer product intrinsics The specification for SME is in -[**Beta** state](#current-status-and-anticipated-changes) and might change or be +[**Beta** state](#support-levels) and might change or be extended in the future. `__ARM_FEATURE_SME_F64F64` is defined to `1` if there is hardware @@ -2555,7 +2559,7 @@ available. This implies that `__ARM_FEATURE_SME` is nonzero. #### Structured sparsity outer product intrinsics The specification for SME is in -[**Alpha** state](#current-status-and-anticipated-changes) and may change or be +[**Alpha** state](#support-levels) and may change or be extended in the future. `__ARM_FEATURE_SME_TMOP` is defined to `1` if there is hardware @@ -2566,7 +2570,7 @@ available. This implies that `__ARM_FEATURE_SME2` is nonzero. #### Quarter-tile outer product intrinsics The specification for SME is in -[**Beta** state](#current-status-and-anticipated-changes) and may change or be +[**Beta** state](#support-levels) and may change or be extended in the future. `__ARM_FEATURE_SME_MOP4` is defined to `1` if there is hardware @@ -5394,7 +5398,7 @@ disabled then it has no side effect and returns `NULL`. # State management The specification for SME is in -[**Beta** state](#current-status-and-anticipated-changes) and might change or be +[**Beta** state](#support-levels) and might change or be extended in the future. ## Introduction @@ -6300,7 +6304,7 @@ each architecture includes its predecessor instruction set. # About FP8 intrinsics The specification for FP8 intrinsics is in -[**Beta** state](#current-status-and-anticipated-changes). +[**Beta** state](#support-levels). Each 8-bit floating point intrinsic call has a parameter to define the format and scale of the operands, and the overflow behavior, as applicable to each @@ -9564,7 +9568,7 @@ when move instructions are required. ### SVE2 BFloat16 data-processing instructions. The specification for B16B16 is in -[**Alpha** state](#current-status-and-anticipated-changes) and might change or be +[**Alpha** state](#support-levels) and might change or be extended in the future. The instructions in this section are available when `__ARM_FEATURE_SVE_B16B16` @@ -9695,7 +9699,7 @@ BFloat16 floating-point multiply vectors. ### SVE BFloat16 floating-point adjust exponent vectors instructions. The specification for SVE BFloat16 floating-point adjust exponent vectors instructions is in -[**Beta** state](#current-status-and-anticipated-changes) and might change or be +[**Beta** state](#support-levels) and might change or be extended in the future. #### BFSCALE @@ -9749,7 +9753,7 @@ Modal 8-bit floating-point matrix multiply-accumulate to single-precision. ### SVE2.1 instruction intrinsics The specification for SVE2.1 is in -[**Beta** state](#current-status-and-anticipated-changes) and might change or be +[**Beta** state](#support-levels) and might change or be extended in the future. The functions in this section are defined by the header file @@ -10103,7 +10107,7 @@ Use of this intrinsic if `svcntb() * 8 < 256` results in undefined behaviour. ### SVE2 Multi-vector AES and 128-bit polynomial multiply long instructions The specification for SVE2 Multi-vector AES and 128-bit polynomial multiply long instructions is in -[**Beta** state](#current-status-and-anticipated-changes) and might change or be +[**Beta** state](#support-levels) and might change or be extended in the future. #### AESE, AESD, AESEMC, AESDIMC @@ -10140,7 +10144,7 @@ Multi-vector 128-bit polynomial multiply long instructions. # SME language extensions and intrinsics The specification for SME is in -[**Beta** state](#current-status-and-anticipated-changes) and might change or be +[**Beta** state](#support-levels) and might change or be extended in the future. ## Controlling the use of streaming mode @@ -13213,7 +13217,7 @@ BFloat16 floating-point adjust exponent vectors. ### SME2.1 instruction intrinsics The specification for SME2.1 is in -[**Beta** state](#current-status-and-anticipated-changes) and might change or +[**Beta** state](#support-levels) and might change or be extended in the future. The intrinsics in this section are defined by the header file @@ -13358,7 +13362,7 @@ Zero ZA vector groups ### SME2.2 instruction intrinsics The specification for SME2.2 are in -[**Beta** state](#current-status-and-anticipated-changes) and might change or be +[**Beta** state](#support-levels) and might change or be extended in the future. The intrinsics in this section are defined by the header file @@ -13413,7 +13417,7 @@ are named after. All of the functions have external linkage. ### SVE2.1 and SME2 instruction intrinsics The specification for SVE2.1 is in -[**Beta** state](#current-status-and-anticipated-changes) and might change or be +[**Beta** state](#support-levels) and might change or be extended in the future. The functions in this section are defined by either the header file @@ -13946,7 +13950,7 @@ While (resulting in predicate tuple) ### SVE2.2 and SME2.2 instruction intrinsics The specification for SVE2.2 and SME2.2 are in -[**Beta** state](#current-status-and-anticipated-changes) and might change or be +[**Beta** state](#support-levels) and might change or be extended in the future. The functions in this section are defined by either the header file @@ -14038,7 +14042,7 @@ Scalar index of first/last true predicate element (predicated). ### SVE2.3 and SME2.3 instruction intrinsics The specification for SVE2.3 and SME2.3 are in -[**Alpha** state](#current-status-and-anticipated-changes) and might change or be +[**Alpha** state](#support-levels) and might change or be extended in the future. The functions in this section are defined by either the header file diff --git a/morello/morello.md b/morello/morello.md index 9e9ff57a..1926f66c 100644 --- a/morello/morello.md +++ b/morello/morello.md @@ -116,7 +116,7 @@ reserved. ## Change Control -### Current Status and Anticipated Changes +### Support levels The following support level definitions are used by the ACLE specifications: diff --git a/neon_intrinsics/advsimd.md b/neon_intrinsics/advsimd.md index 76eefe0c..81ca5085 100644 --- a/neon_intrinsics/advsimd.md +++ b/neon_intrinsics/advsimd.md @@ -1,6 +1,5 @@ --- title: Arm Neon Intrinsics Reference -date-of-issue: 15 May 2026 # LaTeX specific variables landscape: true copyright-text: "Copyright: see section \\texorpdfstring{\\nameref{copyright}}{Copyright}." @@ -108,7 +107,23 @@ for more information about Arm’s trademarks. * Copyright 2014-2026 Arm Limited and/or its affiliates * Copyright 2021 Matt P. Dziubinski -## Document history +## About this document + +### Continuously updated specification + +After 2026Q1, this specification is published continuously from the +main branch. Each published version is identified by its Git commit hash. + +See [Changelog for year 2026](#changelog-for-year-2026). + +### Changelog for year 2026 + +* Added support for FEAT_F16F32DOT +* Added support for FEAT_F16F32MM and FEAT_F16MM +* Renamed vmmlaq_f16_f16 to vmmlaq_f16 +* Added documentation for missing Neon intrinsics + +### Legacy changelog | Issue | Date | Change | | ----- | ----------------- | -------------------- | @@ -128,12 +143,12 @@ for more information about Arm’s trademarks. | N | 06 June 2025 | 2025Q2 | | O | 15 May 2026 | 2026Q1 | -### Changes between 2021Q2 and 2021Q3 +#### Changes between 2021Q2 and 2021Q3 * Fixed the guard macro for the base intrinsics. * Corrected ``sdot``, ``udot`` and ``usdot`` specification on AArch32. -### Changes between 2021Q3 and 2021Q4. +#### Changes between 2021Q3 and 2021Q4. * Fixed typo in signature of ``vaddq_s16``. * Updated copyright statement in section [Copyright](#copyright). @@ -142,39 +157,32 @@ for more information about Arm’s trademarks. used to render the PDF of the specs. The PDF is rendered using the standard layout used in Arm specifications. * Added missing item for release 2021Q3 in the table with the list of - versions in section [Document history](#document-history). + versions in section [Legacy changelog](#legacy-changelog). -### Changes between 2021Q4 and 2023Q2 +#### Changes between 2021Q4 and 2023Q2 * Added support for FEAT_LRCPC3 LDAP1/STL1 intrinsics. -### Changes between 2023Q2 and 2024Q3 +#### Changes between 2023Q2 and 2024Q3 * Fixed the range of the ``lane`` immediate argument for ``vst2q_lane_f64``. -### Changes between 2024Q3 and 2024Q4 +#### Changes between 2024Q3 and 2024Q4 * Added `mf8` forms of the `vbsl`, `vluti2` and `vluti4` families of intrinsics. -### Changes between 2024Q4 and 2025Q2 +#### Changes between 2024Q4 and 2025Q2 * Added `fp8` version of the `vget_lane` intrinsic. -### Changes between 2025Q2 and 2026Q1 +#### Changes between 2025Q2 and 2026Q1 * Added support for FEAT_FPRCVT intrinsics. * Fixed typos in the "AArch64 Instruction" and "Result" fields of floating point conversion intrinsics from "Half Precision to 32-bit" and "Half Precision to 64-bit". -### Changes since 2026Q1 - -* Added support for FEAT_F16F32DOT -* Added support for FEAT_F16F32MM and FEAT_F16MM -* Renamed vmmlaq_f16_f16 to vmmlaq_f16 -* Added documentation for missing Neon intrinsics -