pulpissimo JTAG issue with NEXYS A7

[PengchengYang-xdu]

Hi, guys. I encountered an issue with JTAG, it seemed normal when compiling and downloading bitstream. However, the JTAG just doesn't work properly.
In addition, I use boot_zforth() instead of boot_jtag_openocd() before, system works properly, when i test uart, the baudrate have to be set to 57600, which is not the same with the design config(115200). Does this have anything to wo with the JTAG problem?

[PengchengYang-xdu]

Openocd and JTAG work properly in simulation.

[PengchengYang-xdu]

fix it by modifiying ./target/fpga/pulpissimo-nexys/rtl/xilinx_pulpissimo.v, changing the direction of pad_jtag_tdo from input to inout. see pr #446.