Canonical-ABI glue survives the dissolve: componentizing a scalar-only driver doubles .text, and cabi_realloc (x2) is never removed

[avrabe]

Measured while turning gale's thin-seam drivers into real components (gale REQ-DRV-COMPONENT-001). Reporting because it changes whether that migration is affordable at all on a 32 KB part.

The numbers — same driver, same toolchain (loom 1.2.0 + synth 0.52.0, cortex-m3, --all-exports --relocatable)

shape	.text
raw #[no_mangle] exports, env.mmio_* imports (today)	502 B
component: import gust:hal/mmio, export gust:hal/gpio, canonical exports only	1032 B
component, dual-exporting raw + canonical (transitional)	1196 B
dual-export after loom optimize --passes inline	1202 B

So componentizing roughly doubles a tiny driver, and loom does not reduce it.

What is in the extra bytes

$ arm-none-eabi-nm gpio.o | grep ' T '
T cabi_realloc
T cabi_realloc_wit_bindgen_0_52_0
T gust:hal/gpio@0.1.0#clear
T gust:hal/gpio@0.1.0#configure
T gust:hal/gpio@0.1.0#read
T gust:hal/gpio@0.1.0#set
T gust:hal/gpio@0.1.0#toggle

Two observations:

1. cabi_realloc is emitted twice and is unreachable. The whole interface is scalar — every function is func(u32, u32[, u32]) -> [u32]. Nothing is lifted or lowered that could allocate. Neither realloc can ever be called on this component, yet both survive --passes inline.
2. The canonical wrappers roughly double the function bodies. Discounting the ~104 B of realloc, five canonical wrappers cost ~928 B against ~502 B for the same five functions exported raw.

Why this matters for the dissolve specifically

In a hosted runtime the canonical ABI is load-bearing. In this pipeline it is not: the component is fused and lowered ahead of time, and the native consumer calls the functions directly — nothing ever performs a canonical lift/lower at runtime. The glue is build-time scaffolding that survives into the shipped image.

The interface here is the cheapest possible case (all scalars). If it costs 2x, the cost on richer interfaces is worth knowing before eight drivers each pay it.

The ask

Is there a pass — or could there be — that recognises canonical-ABI export glue as dead once the component has been fused for ahead-of-time lowering, and drops it along with an unreachable cabi_realloc? Even just DCE'ing a provably-uncallable cabi_realloc on scalar-only interfaces would be a clear win.

Happy to provide the fixture: gpio-thin is a single public crate, five scalar functions, and both shapes are one cargo build apart. Same offer as the synth#882 fixtures, which turned out to catch more than was reported.

Repro

git clone https://github.com/pulseengine/gale
cd gale/benches/gust/drivers/gpio-thin      # branch: feat/gpio-thin-component
cargo build --release --target wasm32-unknown-unknown
loom optimize target/wasm32-unknown-unknown/release/gust_gpio_thin.wasm --passes inline -o /tmp/g.wasm
synth compile /tmp/g.wasm --target cortex-m3 --all-exports --relocatable -o /tmp/g.o
arm-none-eabi-size /tmp/g.o

[avrabe]

Triage — confirmed optimization, measured, actionable; a concrete instance of #239 ("make components small"). Not a correctness bug (output is right, just large), so this rides the size/perf track, not the trap/soundness track.

Classification against the existing #239 phases

Your two extra-byte sources map cleanly onto #239's plan:

1. cabi_realloc ×2, unreachable → Make components small: custom-section GC + component-level reachability GC + canon seam dissolution #239 Phase B (component reachability GC). This is the affordable near-term win you flagged ("even just DCE'ing a provably-uncallable cabi_realloc on scalar-only interfaces"). A mark-and-sweep over the component's export→instance→alias→canon→core-func graph drops anything uncallable. cabi_realloc on an all-scalar interface is provably uncallable (nothing lifts/lowers a list/string/record that could allocate), so it's a sound structural drop. ~104 B here, and it's the same mechanism regardless of interface richness.

2. Canonical wrapper bodies (~928 B vs ~502 B raw) → Make components small: custom-section GC + component-level reachability GC + canon seam dissolution #239 Phase C (canon-seam dissolution). This is the stubbed component_optimizer.rs:624 ("Future: Inline trivial lift/lower pairs"). Bigger prize, but it can only be dropped when the component is fused for AOT lowering and the native consumer calls directly — exactly the dissolve pipeline you describe. In a hosted runtime this glue is load-bearing (H-13 / SC-12 in our safety model: "component optimizer breaks adapter semantics"), so Phase C must be gated on (a) a closed-world/AOT signal and (b) the behavioral differential gate (Behavioral differential as an optimization gate (self-certify non-Z3-backstoppable transforms) #238), never applied universally.

Sequencing

• Phase B (incl. the cabi_realloc DCE) first — structural, v1.1.11 element remap scrambles the function-pointer table — valid-but-wrong code, falcon SIL gate fails (0.13m → 593.8m) #196-safe (keep exports/start/indirect-table targets live, conservative on parse failure), no Behavioral differential as an optimization gate (self-certify non-Z3-backstoppable transforms) #238 dependency. This is the clear, bounded win.
• Phase C (wrapper dissolution) after, gated by Behavioral differential as an optimization gate (self-certify non-Z3-backstoppable transforms) #238.

Fixture — yes please

The gpio-thin offer is ideal: a scalar-only, single-crate, two-shapes-one-build-apart case is the perfect regression fixture for Phase B (assert the two cabi_realloc are gone and .text drops, output still validates + behaves). It'll go in the component corpus alongside the synth#882-style fixtures. Please point me at feat/gpio-thin-component.

Scope decision

Landing this under #239 as the first concrete, measured driver of Phase B (with gpio-thin as its acceptance fixture), targeting the component-size release. Phase B's reachability GC is the deliverable; the cabi_realloc DCE is its first checkable win. The rivet requirement + fixture land with the implementation PR (feature-loop placement, so the artifact carries its verification). Tracking here; will link the PR when cut.

Note: this is queued behind restoring main to green (a floating-dep bump train has main red right now, unrelated to this) — flagging so the sequencing is honest.

[avrabe]

Three more drivers through the same transformation, and the shape of the cost is clearer than my first report — it is fixed per component, not proportional, which makes it worse for exactly the drivers this project cares about.

All measured on synth 0.52.0, cortex-m3, --all-exports --relocatable, same driver source either side:

driver	raw exports	componentized	delta	ratio
gpio-thin	502 B	1196 B	+694	2.4x
timer-thin	204 B	828 B	+624	4.0x
spi-thin	454 B	1244 B	+790	2.7x
uart-thin	254 B	872 B	+618	3.4x

~+700 B regardless of driver size. The alarming ratios are just small baselines meeting a constant. A 204-byte timer driver becomes a 828-byte one. Every one of these interfaces is scalar-only, so both cabi_realloc symbols are unreachable in all four.

Eight drivers at this rate is roughly +5.6 KB on parts where the entire argument is a 32 KB budget.

A second, separable finding

uart-thin's dissolve recipe uses --native-pointer-abi. wit-bindgen emits a 16-byte .rodata segment (the cabi_realloc alignment constants) into all of these modules; harmless in the other three, but under that flag it materialises into the linmem region:

uart-thin, --native-pointer-abi:   text=864  data=20  bss=1048600
uart-thin, without:                text=872  data=0   bss=0

1 MB of .bss for 8 bytes of text. These drivers advertise 0-SRAM as a headline property, so that is a real regression and we are simply dropping the flag for uart. Flagging it because the trigger is the same unreachable cabi_realloc constants — if they were DCE'd, the interaction would not exist either.

Fixtures for all four are public and one cargo build apart from their pre-change shape (gale branches feat/gpio-thin-component, feat/driver-components-batch2). Happy to wire whichever is most useful as a regression case.