From 313b1d05ca416fbbfdb0c244178e0e8f3b865459 Mon Sep 17 00:00:00 2001 From: Akash Kumar Date: Fri, 21 Aug 2026 12:29:18 +0530 Subject: [PATCH 1/5] FROMLIST: arm64: dts: qcom: Add support for usb nodes on Shikra Add support for both USB controllers and their respective phys on Shikra. Reviewed-by: Konrad Dybcio Reviewed-by: Manivannan Sadhasivam Signed-off-by: Krishna Kurapati Link: https://lore.kernel.org/r/20260811-usb-shikra-v7-v7-1-753e928f37ae@oss.qualcomm.com [submitter: qcom-6.18.y already carried an older v1/v2-era usb_1 and usb_qmpphy node definition (FROMLIST 90ffd3d3086a "Add USB changes for Shikra" and 1c76289b040a "Add changes for usb on IQS platform"). Per request, landed v7 fresh: replaced the old usb_qmpphy node (qcom,shikra-qmp-usb3-phy) and old usb_1 node with v7's versions (qcom,shikra-qmp-usb3-dp-phy, relocated usb_1 block, new usb_2 block), rather than layering v7 on top of the old nodes. Resulting content matches the original patch; no semantic changes beyond superseding the older node definitions.] --- arch/arm64/boot/dts/qcom/shikra.dtsi | 274 ++++++++++++++++++--------- 1 file changed, 184 insertions(+), 90 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/shikra.dtsi b/arch/arm64/boot/dts/qcom/shikra.dtsi index 141fbc51b0768..5fa35d8e16ce5 100644 --- a/arch/arm64/boot/dts/qcom/shikra.dtsi +++ b/arch/arm64/boot/dts/qcom/shikra.dtsi @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -1255,30 +1256,30 @@ }; usb_qmpphy: phy@1615000 { - compatible = "qcom,shikra-qmp-usb3-phy"; - reg = <0x0 0x01615000 0x0 0x1000>; + compatible = "qcom,shikra-qmp-usb3-dp-phy"; + reg = <0x0 0x01615000 0x0 0x2000>; - clocks = <&gcc GCC_AHB2PHY_USB_CLK>, + clocks = <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, <&gcc GCC_USB3_PRIM_CLKREF_EN>, - <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, + <&gcc GCC_AHB2PHY_USB_CLK>, <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; - clock-names = "cfg_ahb", + clock-names = "aux", "ref", - "com_aux", + "cfg_ahb", "pipe"; - resets = <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>, - <&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>; - reset-names = "phy", - "phy_phy"; + resets = <&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>, + <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, + <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>; + reset-names = "phy_phy", + "dp_phy", + "phy"; - #clock-cells = <0>; - clock-output-names = "usb3_phy_pipe_clk_src"; - - #phy-cells = <0>; + #clock-cells = <1>; + #phy-cells = <1>; orientation-switch; - qcom,tcsr-reg = <&tcsr_regs 0xb244>; + qcom,tcsr-reg = <&tcsr_regs 0xb244 0xb248>; status = "disabled"; @@ -1303,6 +1304,21 @@ }; }; + usb_2_hsphy: phy@1617000 { + compatible = "qcom,shikra-qusb2-phy"; + reg = <0x0 0x01617000 0x0 0x180>; + + clocks = <&gcc GCC_AHB2PHY_USB_CLK>, + <&rpmcc RPM_SMD_XO_CLK_SRC>; + clock-names = "cfg_ahb", "ref"; + + resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; + nvmem-cells = <&qusb2_hstx_trim_2>; + #phy-cells = <0>; + + status = "disabled"; + }; + system_noc: interconnect@1880000 { compatible = "qcom,shikra-sys-noc"; reg = <0x0 0x01880000 0x0 0x6a080>; @@ -1384,6 +1400,11 @@ #address-cells = <1>; #size-cells = <1>; + qusb2_hstx_trim_2: hstx-trim@25a { + reg = <0x25a 0x1>; + bits = <4 4>; + }; + qusb2_hstx_trim_1: hstx-trim@25b { reg = <0x25b 0x1>; bits = <1 4>; @@ -2602,81 +2623,6 @@ }; }; - usb_1: usb@4e00000 { - compatible = "qcom,shikra-dwc3", "qcom,snps-dwc3"; - reg = <0x0 0x04e00000 0x0 0xfc100>; - - clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB30_PRIM_MASTER_CLK>, - <&gcc GCC_SYS_NOC_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB30_PRIM_SLEEP_CLK>, - <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, - <&gcc GCC_USB3_PRIM_CLKREF_EN>; - clock-names = "cfg_noc", - "core", - "iface", - "sleep", - "mock_utmi", - "xo"; - - assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_PRIM_MASTER_CLK>; - assigned-clock-rates = <19200000>, <133333333>; - - interrupts-extended = <&intc GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH 0>, - <&intc GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH 0>, - <&intc GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH 0>, - <&intc GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH 0>, - <&intc GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 0>; - interrupt-names = "dwc_usb3", - "pwr_event", - "qusb2_phy", - "hs_phy_irq", - "ss_phy_irq"; - - iommus = <&apps_smmu 0x120 0x0>; - - phys = <&usb_1_hsphy>, <&usb_qmpphy>; - phy-names = "usb2-phy", "usb3-phy"; - - power-domains = <&gcc GCC_USB30_PRIM_GDSC>; - - resets = <&gcc GCC_USB30_PRIM_BCR>; - - snps,dis_u2_susphy_quirk; - snps,dis_enblslpm_quirk; - snps,has-lpm-erratum; - snps,hird-threshold = /bits/ 8 <0x10>; - snps,usb3_lpm_capable; - snps,parkmode-disable-ss-quirk; - - usb-role-switch; - - wakeup-source; - - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - - usb_1_dwc3_hs: endpoint { - }; - }; - - port@1 { - reg = <1>; - - usb_1_dwc3_ss: endpoint { - remote-endpoint = <&usb_qmpphy_usb_ss_in>; - }; - }; - }; - }; - bam_dmux_dma: dma-controller@6044000 { compatible = "qcom,bam-v1.7.0"; reg = <0x0 0x06044000 0x0 0x19000>; @@ -2865,6 +2811,154 @@ }; }; + usb_2: usb@4c00000 { + compatible = "qcom,shikra-dwc3", "qcom,snps-dwc3"; + reg = <0x0 0x04c00000 0x0 0xfc100>; + + clocks = <&gcc GCC_CFG_NOC_USB2_PRIM_AXI_CLK>, + <&gcc GCC_USB20_MASTER_CLK>, + <&gcc GCC_SYS_NOC_USB2_PRIM_AXI_CLK>, + <&gcc GCC_USB20_SLEEP_CLK>, + <&gcc GCC_USB20_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; + + assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>, + <&gcc GCC_USB20_MASTER_CLK>; + assigned-clock-rates = <19200000>, <133333333>; + + interrupts-extended = <&intc GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH 0>, + <&intc GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH 0>, + <&intc GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH 0>, + <&mpm 59 IRQ_TYPE_LEVEL_HIGH>, + <&mpm 58 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq"; + + iommus = <&apps_smmu 0x140 0x0>; + + maximum-speed = "high-speed"; + + phys = <&usb_2_hsphy>; + phy-names = "usb2-phy"; + + power-domains = <&gcc GCC_USB20_GDSC>; + + qcom,select-utmi-as-pipe-clk; + resets = <&gcc GCC_USB20_BCR>; + + interconnects = <&system_noc MASTER_USB2_0 RPM_ALWAYS_TAG + &mc_virt SLAVE_EBI_CH0 RPM_ALWAYS_TAG>, + <&mem_noc MASTER_AMPSS_M0 RPM_ACTIVE_TAG + &config_noc SLAVE_USB2 RPM_ACTIVE_TAG>; + interconnect-names = "usb-ddr", "apps-usb"; + + snps,dis_u2_susphy_quirk; + snps,dis_enblslpm_quirk; + snps,has-lpm-erratum; + snps,hird-threshold = /bits/ 8 <0x10>; + + usb-role-switch; + wakeup-source; + + status = "disabled"; + + port { + usb_2_dwc3_hs: endpoint { + }; + }; + }; + + usb_1: usb@4e00000 { + compatible = "qcom,shikra-dwc3", "qcom,snps-dwc3"; + reg = <0x0 0x04e00000 0x0 0xfc100>; + + clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>, + <&gcc GCC_SYS_NOC_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; + + assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>; + assigned-clock-rates = <19200000>, <133333333>; + + interrupts-extended = <&intc GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH 0>, + <&intc GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH 0>, + <&intc GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH 0>, + <&mpm 91 IRQ_TYPE_LEVEL_HIGH>, + <&mpm 90 IRQ_TYPE_LEVEL_HIGH>, + <&mpm 12 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + + iommus = <&apps_smmu 0x120 0x0>; + + phys = <&usb_1_hsphy>, <&usb_qmpphy QMP_USB43DP_USB3_PHY>; + phy-names = "usb2-phy", "usb3-phy"; + + power-domains = <&gcc GCC_USB30_PRIM_GDSC>; + + resets = <&gcc GCC_USB30_PRIM_BCR>; + + interconnects = <&system_noc MASTER_USB3 RPM_ALWAYS_TAG + &mc_virt SLAVE_EBI_CH0 RPM_ALWAYS_TAG>, + <&mem_noc MASTER_AMPSS_M0 RPM_ACTIVE_TAG + &config_noc SLAVE_USB3 RPM_ACTIVE_TAG>; + interconnect-names = "usb-ddr", "apps-usb"; + + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,dis_enblslpm_quirk; + snps,has-lpm-erratum; + snps,hird-threshold = /bits/ 8 <0x10>; + snps,usb3_lpm_capable; + snps,parkmode-disable-ss-quirk; + + usb-role-switch; + + wakeup-source; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_1_dwc3_hs: endpoint { + }; + }; + + port@1 { + reg = <1>; + + usb_1_dwc3_ss: endpoint { + remote-endpoint = <&usb_qmpphy_usb_ss_in>; + }; + }; + }; + }; + remoteproc_lpaicp: remoteproc@b800000 { compatible = "qcom,shikra-lpaicp-pas"; reg = <0x0 0x0b800000 0x0 0x200000>; From 7fbef395de6f43ef5a293a397501909a3874bf29 Mon Sep 17 00:00:00 2001 From: Akash Kumar Date: Fri, 21 Aug 2026 12:37:57 +0530 Subject: [PATCH 2/5] FROMLIST: arm64: dts: qcom: Enable USB controllers on Shikra platforms On Shikra CQS/CQM platforms, usb-role-switch is handled by PM4125 on primary Type-C port and Cypress PD controller CYPD6129 on second Type-C port. On Shikra IQS platform, usb-role-switch is handled by Cypress PD controller CYPD6129 on both Type-C ports. Since those changes are not yet present, enabling both USB controllers in device mode. Reviewed-by: Manivannan Sadhasivam Signed-off-by: Krishna Kurapati Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20260811-usb-shikra-v7-v7-2-753e928f37ae@oss.qualcomm.com [submitter: shikra-cqm-evk.dts, shikra-cqs-evk.dts and shikra-iqs-evk.dts already carried &usb_1_hsphy and &usb_qmpphy nodes from earlier v1/v2-era FROMLIST commits (90ffd3d3086a, 1c76289b040a). Only the missing &usb_2_hsphy node from this patch was added to those three files; shikra-evk.dtsi had no prior USB wiring and was applied as-is. Resulting content matches the original patch; no semantic changes.] --- arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts | 8 ++++++++ arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts | 8 ++++++++ arch/arm64/boot/dts/qcom/shikra-evk.dtsi | 12 ++++++++++++ arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts | 8 ++++++++ 4 files changed, 36 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts b/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts index 6650540ed42bb..fa3a0a886cc0d 100644 --- a/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts +++ b/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts @@ -749,6 +749,14 @@ status = "okay"; }; +&usb_2_hsphy { + vdd-supply = <&pm4125_l12>; + vdda-pll-supply = <&pm4125_l13>; + vdda-phy-dpdm-supply = <&pm4125_l21>; + + status = "okay"; +}; + &vamacro { pinctrl-0 = <&dmic01_default>, <&dmic23_default>, <&tx_swr_active>; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts index 852753402dcd5..7d8ccc2f0b0f5 100644 --- a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts +++ b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts @@ -672,6 +672,14 @@ status = "okay"; }; +&usb_2_hsphy { + vdd-supply = <&pm4125_l12>; + vdda-pll-supply = <&pm4125_l13>; + vdda-phy-dpdm-supply = <&pm4125_l21>; + + status = "okay"; +}; + &vamacro { pinctrl-0 = <&dmic01_default>, <&dmic23_default>, <&tx_swr_active>; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/qcom/shikra-evk.dtsi b/arch/arm64/boot/dts/qcom/shikra-evk.dtsi index 5ed8506c98792..57769b9af718c 100644 --- a/arch/arm64/boot/dts/qcom/shikra-evk.dtsi +++ b/arch/arm64/boot/dts/qcom/shikra-evk.dtsi @@ -39,3 +39,15 @@ max-speed = <3200000>; }; }; + +&usb_1 { + dr_mode = "peripheral"; + + status = "okay"; +}; + +&usb_2 { + dr_mode = "peripheral"; + + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts b/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts index 050039ccce83b..ffe870a0c3ffd 100644 --- a/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts +++ b/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts @@ -785,6 +785,14 @@ status = "okay"; }; +&usb_2_hsphy { + vdd-supply = <&pm8150_l4>; + vdda-pll-supply = <&pm8150_l12>; + vdda-phy-dpdm-supply = <&pm8150_l13>; + + status = "okay"; +}; + &vamacro { clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; From a1123d023afcbc3c4134d51e843ac8b81133edfb Mon Sep 17 00:00:00 2001 From: Akash Kumar Date: Fri, 21 Aug 2026 13:05:21 +0530 Subject: [PATCH 3/5] FROMLIST: dt-bindings: usb: Add Cypress cypd6129/cypd6229 Type-C controller Add the device-tree binding documentation for the Cypress cypd6129 and cypd6229 dual Type-C PD controllers. These are used on Shikra CQM/CQS/IQS platforms to handle usb-role-switch for the USB Type-C ports over an I2C interface, similarly to the existing cypd4226 binding. cypd6229 is a variant of cypd6129 and is described with a "cypress,cypd6129" fallback compatible string. Acked-by: Conor Dooley Signed-off-by: Akash Kumar Link: https://lore.kernel.org/r/20260820145036.2035641-2-akash.kumar@oss.qualcomm.com --- .../bindings/usb/cypress,cypd6129.yaml | 99 +++++++++++++++++++ 1 file changed, 99 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/cypress,cypd6129.yaml diff --git a/Documentation/devicetree/bindings/usb/cypress,cypd6129.yaml b/Documentation/devicetree/bindings/usb/cypress,cypd6129.yaml new file mode 100644 index 0000000000000..f709f82f2092f --- /dev/null +++ b/Documentation/devicetree/bindings/usb/cypress,cypd6129.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/cypress,cypd6129.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cypress cypd6129/cypd6229 Type-C Controller + +maintainers: + - Akash Kumar + +description: + The Cypress cypd6129 and cypd6229 are dual Type-C PD controllers that are + controlled via an I2C interface. + +properties: + compatible: + oneOf: + - const: cypress,cypd6129 + - items: + - const: cypress,cypd6229 + - const: cypress,cypd6129 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + pinctrl-0: true + pinctrl-1: true + + pinctrl-names: + minItems: 1 + items: + - const: default + - const: sleep + +patternProperties: + '^connector@[01]$': + $ref: /schemas/connector/usb-connector.yaml# + required: + - reg + +required: + - compatible + - reg + - interrupts + +anyOf: + - required: + - connector@0 + - required: + - connector@1 + +additionalProperties: false + +examples: + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + typec@40 { + compatible = "cypress,cypd6129"; + reg = <0x40>; + interrupts-extended = <&tlmm 136 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 = <&usb0_intr_state>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + + connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + label = "USB-C"; + data-role = "dual"; + power-role = "dual"; + wakeup-source; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + endpoint { + remote-endpoint = <&usb_role_switch0>; + }; + }; + }; + }; + }; + }; From f9e435097c0a0d16ab83291e5f16e8b3697048b5 Mon Sep 17 00:00:00 2001 From: Akash Kumar Date: Fri, 21 Aug 2026 13:06:07 +0530 Subject: [PATCH 4/5] FROMLIST: usb: typec: ucsi: ccg: Add support for cypd6129/cypd6229 Add cypd6129 and cypd6229 compatible strings to the of_device_id match table so the driver binds to boards describing these Cypress PD controllers in their device tree. No other driver changes are needed since the chip is accessed through the same generic UCSI/HPI I2C register protocol as the existing cypd4226 support. Signed-off-by: Akash Kumar Link: https://lore.kernel.org/r/20260820145036.2035641-3-akash.kumar@oss.qualcomm.com --- drivers/usb/typec/ucsi/ucsi_ccg.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/usb/typec/ucsi/ucsi_ccg.c b/drivers/usb/typec/ucsi/ucsi_ccg.c index 9d7b834a76fa8..3d4cf117e35f6 100644 --- a/drivers/usb/typec/ucsi/ucsi_ccg.c +++ b/drivers/usb/typec/ucsi/ucsi_ccg.c @@ -1524,6 +1524,8 @@ static void ucsi_ccg_remove(struct i2c_client *client) static const struct of_device_id ucsi_ccg_of_match_table[] = { { .compatible = "cypress,cypd4226", }, + { .compatible = "cypress,cypd6129", }, + { .compatible = "cypress,cypd6229", }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, ucsi_ccg_of_match_table); From f5f3eda337a14c13b23f4857c2e1bbec91793cf3 Mon Sep 17 00:00:00 2001 From: Akash Kumar Date: Fri, 21 Aug 2026 13:06:41 +0530 Subject: [PATCH 5/5] FROMLIST: arm64: dts: qcom: shikra: Wire up usb-role-switch for USB Type-C ports On Shikra CQS/CQM platforms, usb-role-switch is handled by PM4125 on the primary Type-C port and Cypress PD controller CYPD6129 on the second Type-C port. On Shikra IQS platform, usb-role-switch is handled by Cypress PD controller CYPD6129 on both Type-C ports. Add the CYPD6129 typec node under i2c3, wire its connector endpoints to the corresponding DWC3 controller ports via remote-endpoint phandles, and switch the associated USB controllers to OTG mode so role switching can take effect. Signed-off-by: Akash Kumar Link: https://lore.kernel.org/r/20260820145036.2035641-4-akash.kumar@oss.qualcomm.com [submitter: qcom-6.18.y already carried a PENDING commit (102ec26f93ef "arm64: dts: qcom: Add typec role switching changes to shikra") that wired shikra-cqm-evk.dts and shikra-cqs-evk.dts's usb_1_dwc3_hs/usb_qmpphy_out endpoints to a PM4125-based typec connector (&pm4125_hs_in/&pm4125_ss_in). The version of this patch sent to the list wired CYPD6129 to usb_1_dwc3_hs on CQM/CQS instead, which would have conflicted with that PENDING commit's PM4125 wiring (a DT endpoint can only have one remote-endpoint phandle) and, per updated board-wiring information, does not match the actual hardware: on CQM/CQS, CYPD6129 is wired to the second Type-C port (usb_2) and PM4125 continues to own the primary Type-C port (usb_1), unchanged. This local copy of the patch has been corrected accordingly: the PENDING commit's &pm4125_hs_in/&pm4125_ss_in/usb_1/usb_qmpphy_out wiring on CQM/CQS is restored as-is, and CYPD6129's connector endpoint is wired to the newly added usb_2/usb_2_dwc3_hs instead of usb_1. The PENDING commit's shikra-cqm-som.dtsi portion (&pm4125_typec connector and &pm4125_vbus regulator nodes) is untouched and left in history as-is. shikra-iqs-evk.dts had no such conflict (no PM4125) and is applied as-is. The series needs to be resent upstream with this corrected CQM/CQS wiring.] --- arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts | 64 ++++++++++++-- arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts | 64 ++++++++++++-- arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts | 98 ++++++++++++++++++++- 3 files changed, 208 insertions(+), 18 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts b/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts index fa3a0a886cc0d..7e2fa5bbcb01c 100644 --- a/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts +++ b/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts @@ -313,6 +313,39 @@ 0x800D 0x08>; #sound-dai-cells = <0>; }; + + typec@40 { + compatible = "cypress,cypd6129"; + reg = <0x40>; + interrupts-extended = <&tlmm 136 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 = <&usb0_intr_state>; + pinctrl-names = "default"; + + #address-cells = <1>; + #size-cells = <0>; + + ccg_typec_con0: connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + label = "USB-C"; + data-role = "dual"; + power-role = "dual"; + wakeup-source; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + ucsi_ccg_port: endpoint { + remote-endpoint = <&usb_2_dwc3_hs>; + }; + }; + }; + }; + }; }; &mdss { @@ -701,6 +734,13 @@ output-high; }; + usb0_intr_state: usb0-intr-state { + pins = "gpio136"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + wsa885x_i2c_spkr_sd_n: wsa885x-i2c-spkr-sd-n-active-state { pins = "gpio2"; function = "gpio"; @@ -738,17 +778,16 @@ status = "okay"; }; -&usb_qmpphy_out { - remote-endpoint = <&pm4125_ss_in>; -}; - -&usb_qmpphy { - vdda-phy-supply = <&pm4125_l8>; - vdda-pll-supply = <&pm4125_l13>; +&usb_2 { + dr_mode = "otg"; status = "okay"; }; +&usb_2_dwc3_hs { + remote-endpoint = <&ucsi_ccg_port>; +}; + &usb_2_hsphy { vdd-supply = <&pm4125_l12>; vdda-pll-supply = <&pm4125_l13>; @@ -757,6 +796,17 @@ status = "okay"; }; +&usb_qmpphy_out { + remote-endpoint = <&pm4125_ss_in>; +}; + +&usb_qmpphy { + vdda-phy-supply = <&pm4125_l8>; + vdda-pll-supply = <&pm4125_l13>; + + status = "okay"; +}; + &vamacro { pinctrl-0 = <&dmic01_default>, <&dmic23_default>, <&tx_swr_active>; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts index 7d8ccc2f0b0f5..bb60470b16089 100644 --- a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts +++ b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts @@ -294,6 +294,39 @@ #sound-dai-cells = <0>; }; + + typec@40 { + compatible = "cypress,cypd6129"; + reg = <0x40>; + interrupts-extended = <&tlmm 136 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 = <&usb0_intr_state>; + pinctrl-names = "default"; + + #address-cells = <1>; + #size-cells = <0>; + + ccg_typec_con0: connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + label = "USB-C"; + data-role = "dual"; + power-role = "dual"; + wakeup-source; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + ucsi_ccg_port: endpoint { + remote-endpoint = <&usb_2_dwc3_hs>; + }; + }; + }; + }; + }; }; &mdss { @@ -623,6 +656,13 @@ output-high; }; + usb0_intr_state: usb0-intr-state { + pins = "gpio136"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + wsa885x_i2c_spkr_sd_n: wsa885x-i2c-spkr-sd-n-active-state { pins = "gpio2"; function = "gpio"; @@ -661,17 +701,16 @@ status = "okay"; }; -&usb_qmpphy_out { - remote-endpoint = <&pm4125_ss_in>; -}; - -&usb_qmpphy { - vdda-phy-supply = <&pm4125_l8>; - vdda-pll-supply = <&pm4125_l13>; +&usb_2 { + dr_mode = "otg"; status = "okay"; }; +&usb_2_dwc3_hs { + remote-endpoint = <&ucsi_ccg_port>; +}; + &usb_2_hsphy { vdd-supply = <&pm4125_l12>; vdda-pll-supply = <&pm4125_l13>; @@ -680,6 +719,17 @@ status = "okay"; }; +&usb_qmpphy_out { + remote-endpoint = <&pm4125_ss_in>; +}; + +&usb_qmpphy { + vdda-phy-supply = <&pm4125_l8>; + vdda-pll-supply = <&pm4125_l13>; + + status = "okay"; +}; + &vamacro { pinctrl-0 = <&dmic01_default>, <&dmic23_default>, <&tx_swr_active>; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts b/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts index ffe870a0c3ffd..95eb44314874e 100644 --- a/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts +++ b/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts @@ -405,6 +405,69 @@ assigned-clock-rates = <12288000>; #sound-dai-cells = <0>; }; + + typec@40 { + compatible = "cypress,cypd6229"; + reg = <0x40>; + interrupts-extended = <&tlmm 50 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 = <&usb0_intr_state>; + pinctrl-names = "default"; + + #address-cells = <1>; + #size-cells = <0>; + + ccg_typec_con0: connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + label = "USB2-Type-C"; + data-role = "dual"; + power-role = "dual"; + wakeup-source; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + ucsi_ccg_port0_hs: endpoint { + remote-endpoint = <&usb_2_dwc3_hs>; + }; + }; + }; + }; + + ccg_typec_con1: connector@1 { + compatible = "usb-c-connector"; + reg = <1>; + label = "USB3-Type-C"; + data-role = "dual"; + power-role = "dual"; + wakeup-source; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + ucsi_ccg_port_1_hs: endpoint { + remote-endpoint = <&usb_1_dwc3_hs>; + }; + }; + + port@1 { + reg = <1>; + + ucsi_ccg_port_1_ss: endpoint { + remote-endpoint = <&usb_qmpphy_out>; + }; + }; + }; + }; + }; }; &i2c4 { @@ -751,6 +814,13 @@ function = "gpio"; bias-pull-up; }; + + usb0_intr_state: usb0-intr-state { + pins = "gpio50"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; }; &uart8 { @@ -765,11 +835,15 @@ }; &usb_1 { - dr_mode = "otg"; + /delete-property/ dr_mode; status = "okay"; }; +&usb_1_dwc3_hs { + remote-endpoint = <&ucsi_ccg_port_1_hs>; +}; + &usb_1_hsphy { vdd-supply = <&pm8150_l4>; vdda-pll-supply = <&pm8150_l12>; @@ -778,11 +852,16 @@ status = "okay"; }; -&usb_qmpphy { - vdda-phy-supply = <&pm8150_l6>; - vdda-pll-supply = <&pm8150_l12>; +&usb_2 { + /delete-property/ dr_mode; status = "okay"; + + port { + usb_2_dwc3_hs: endpoint { + remote-endpoint = <&ucsi_ccg_port0_hs>; + }; + }; }; &usb_2_hsphy { @@ -793,6 +872,17 @@ status = "okay"; }; +&usb_qmpphy { + vdda-phy-supply = <&pm8150_l6>; + vdda-pll-supply = <&pm8150_l12>; + + status = "okay"; +}; + +&usb_qmpphy_out { + remote-endpoint = <&ucsi_ccg_port_1_ss>; +}; + &vamacro { clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;