On MC6800, JSR only provides extended addressing, so it always needs two bytes as an operand, even if the address is on the zero page.
The current cr6800.py fails to handle this properly, generating an undocumented instruction (9D known as HCF):
JSR $0010
is assembled as:
9D 10
instead of:
BD 00 10
On MC6800, JSR only provides extended addressing, so it always needs two bytes as an operand, even if the address is on the zero page.
The current cr6800.py fails to handle this properly, generating an undocumented instruction (9D known as HCF):
JSR $0010is assembled as:
9D 10instead of:
BD 00 10