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Achievement: YOLOAchievement: Pull Shark

Achievements

Achievement: YOLOAchievement: Pull Shark

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Entropify/README.md

Hello there! (General Kenobi, you are a bold one)πŸ‘‹

β–¬β–¬ΞΉ $\color{blue}{\text{β•β•β•β•β•β•β•β•β•β•β•β•β•βˆ˜}}$ ~zzzhhwooom

  • I’m currently working on VLSI and embedded projects I find interesting that also help me learn new skills
  • I’m currently learning Python, C, Verilog, Java, SystemVerilog and also plan to learn UVM in the future
  • I’m looking to collaborate on any interesting ideas for hardware and embedded projects
  • I’m looking for help with RTL design & verification, VLSI frontend & backend, FPGA implementation, embedded design, PCB design
  • Pronouns: he/him
  • Fun fact: The fastest I've ever skied is 87 km/h, that's faster than city metros (it also hurts a lot if you fall at that speed, I would know...)

Pinned Loading

  1. Entropic_R32-P5_RISC-V Entropic_R32-P5_RISC-V Public

    5-Stage Pipelined RISC-V CPU utilizing the RV32I ISA, featuring dynamic branch prediction. Designed, verified, performance tested, and ASIC-flowed

    Python 4

  2. Entropic_R32-SC_RISC-V Entropic_R32-SC_RISC-V Public

    Single-cycle RISC-V CPU utilizing the RV32I ISA. Designed, verified and ASIC-flowed

    SystemVerilog 3

  3. spi-pwm-controller-uwasic spi-pwm-controller-uwasic Public

    Forked from UW-ASIC/onboarding-start

    UWASIC PWM peripheral controller chip using SPI protocol with TT's interface and SkyWater 130nm PDK, GDS 3D visualizer in deployed page below ↓

    Python 3

  4. my-hdlbits-solutions my-hdlbits-solutions Public

    An archive for my solutions to HDLBits (a RTL learning platform by UofT) problem sets, organized by topic

    Verilog 2

  5. OmniMacro OmniMacro Public

    All the geeky macro / productivity / keyboard / mouse tools you need packaged in one. (win64 only)

    Python 7

  6. Peteryhs/Weather-Station Peteryhs/Weather-Station Public

    C++ 3