Popular repositories Loading
-
-
axi-lite-complaint-dual-mode-arbiter
axi-lite-complaint-dual-mode-arbiter PublicConfigurable AXI arbiter (Round Robin / Fixed Priority + Aging) — RTL verified in Vivado, implemented on Xilinx Artix-7, UVM testbench verified on Xcelium 25.03
SystemVerilog
-
cltv-prediction-model
cltv-prediction-model PublicCatBoost regression model predicting customer lifetime value (CLTV) for a motor insurer, using 35 engineered features, 5-fold CV across 3 seeds, and ensemble averaging. Verified OOF R² = 0.161, RMS…
Python
Something went wrong, please refresh the page to try again.
If the problem persists, check the GitHub status page or contact support.
If the problem persists, check the GitHub status page or contact support.