refactor(ops): route basic Llama through canonical InfiniOps - #1483
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What
greedy-sampling, residual RMSNorm, and SwiGLU paths through canonical
InfiniOps C++ APIs.
refactor(ops): migrate paged attention to canonical InfiniOps #1481. This PR now targets
main; refactor(ops): migrate paged attention to canonical InfiniOps #1481 is closed as superseded.adapters from the validated InfiniCore path.
Argmaxprovider on NVIDIA. The InfiniOps externalbuild enables only
argmax, InfiniCore selects provider implementation 8,and the gitlink remains at
47c1c496, before InfiniOps issue/867 fix cpu malloc #918.adaptation remains inside InfiniCore providers.
Migration
KvCachingInfinilm/ legacy InfiniOP adapterReshapeAndCacheFlashPagedAttentionPrefillInfinilm/ legacy InfiniOP adapterFlashAttnVarlenFuncPagedAttentionInfinilmfallbackFlashAttnWithKvcacheRotaryEmbeddingInfinilm/ legacy InfiniOP adapterRotaryEmbeddingtop_k=1)RandomSampleInfinilm/ legacy InfiniOP adapterArgmaxAddRmsNormFusedAddRmsNormSwiglu(a, b)Copy+SiluAndMul[gate=b, up=a], then evaluate vLLM'ssilu(gate) * upcontract.Alignment Evidence
The selected targets follow InfiniOps' alignment policy: prefer a public
PyTorch Python API, then a serving-framework wrapper, then ONNX or a
library-owned public interface. InfiniOps applies the accepted C++ ordering
adaptation: tensor inputs, attributes, then writable outputs.
Embeddingembedding(input, weight, padding_idx=None, max_norm=None, norm_type=2.0, scale_grad_by_freq=False, sparse=False)torch.nn.functional.embeddingRmsNormrms_norm(out, input, weight, epsilon); InfiniOps movesoutto the output group_custom_ops.rms_normGemmGemm(A, B, C?, alpha, beta, transA, transB) -> YGemmRotaryEmbeddingrotary_embedding(positions, query, key, head_size, cos_sin_cache, is_neox, rope_dim_offset=0, inverse=False)_custom_ops.rotary_embeddingReshapeAndCacheFlashreshape_and_cache_flash(key, value, key_cache, value_cache, slot_mapping, kv_cache_dtype, k_scale, v_scale)_custom_ops.reshape_and_cache_flashFlashAttnVarlenFuncflash_attn_varlen_func(q, k, v, cu_seqlens_q, cu_seqlens_k, max_seqlen_q, max_seqlen_k, ..., return_attn_probs=False)FlashAttnWithKvcacheflash_attn_with_kvcache(q, k_cache, v_cache, k=None, v=None, ..., return_softmax_lse=False)FusedAddRmsNormfused_add_rms_norm(input, residual, weight, epsilon)_custom_ops.fused_add_rms_normCopyTensor.copy_(src, non_blocking=False); InfiniOps represents the receiver as trailingoutTensor.copy_SiluAndMulSiluAndMul.forward(x), wheresilu(x[..., :d]) * x[..., d:]SiluAndMulArgmaxtorch.argmax(input, dim=None, keepdim=False)torch.argmaxScope
This PR targets the NVIDIA basic Llama architecture flow used by InfiniLM with
paged FlashAttention and greedy sampling. Qwen3 uses this same validated path.
Non-greedy sampling, unsupported attention layouts, other model families, and
other devices remain out of scope.
InfiniOps #918 is not a dependency of this PR. It remains an optional native
NVIDIA
Argmaximplementation; this PR uses the generated PyTorch provider.Screenshots: N/A (backend integration only).
Validation
Run on
ssh nvidiainaccelerator-dev/nvidia:lateston one NVIDIAA100-SXM4-80GB:
git diff --check origin/main...HEADpassed.clang-format 16.0.6 --dry-run --Werrorpassed for every modified C++ file.ruff 0.15.20 checkandruff 0.15.20 format --checkpassed for the modifiedPython test.
WITH_TORCH=ONandINFINI_OPS_TORCH_OPS=argmax. The built library referencesat::argmax_out; no native NVIDIA Argmax source from issue/867 fix cpu malloc #918 is present.InfiniCore path.
LD_PRELOADtrap covering 607 legacyinfiniop*C API symbols across 154descriptor families did not fire during inference.
matched PyTorch for the first 6 generated tokens, then selected
" just"where PyTorch selected
" said". At that first divergence, PyTorch BF16logits are exactly tied at
22.875for both tokens, so exact sequenceequality is not a stable precision criterion for this prompt.
Transformers exactly (64/64), including the decoded text.
Commands used for both Qwen3 models:
python3 examples/test_infer.py \ --device=nvidia \ --model=/tmp/standard-llama/Qwen3-0.6B \ --enable-paged-attn \ --attn=flash-attn \ --top-k=1 \ --top-p=1.0 \ --temperature=1.0 \ --max-new-tokens=64 \ --prompt=Hello python3 examples/test_infer.py \ --device=nvidia \ --model=/tmp/standard-llama/Qwen3-4B \ --enable-paged-attn \ --attn=flash-attn \ --top-k=1 \ --top-p=1.0 \ --temperature=1.0 \ --max-new-tokens=64 \ --prompt=Hello