[26.04_linux-nvidia-bos] firmware: tegra: bpmp: grow debugfs read buffer

Documentation/ABI/testing/sys-platform-tegra-bpmp

@@ -0,0 +1,49 @@
+What:           /sys/bus/platform/devices/<bpmp-device>/mbwt_control/pcie_instance_id
+What:           /sys/bus/platform/devices/<bpmp-device>/mbwt_control/vc_type
+What:           /sys/bus/platform/devices/<bpmp-device>/mbwt_control/bandwidth
+Date:           March 2026
+KernelVersion:  6.18
+Contact:        Aniruddha TVS Rao <anrao@nvidia.com>
+Description:
+               On ACPI-based Tegra systems the BPMP driver does not use the
+               device-tree mailbox path; firmware interaction is via AML. This sysfs
+               interface is a userspace tuning knob for memory bandwidth throttler
+               (MBWT) settings.
+
+               On Tegra410, the PCIe bandwidth control path exposes QoS that caps
+               aggregate bandwidth for PCIe and for GPU traffic over UPHY. Each PCIe
+               bandwidth group has a single shared cap for all traffic in that group.
+               A group may contain only PCIe devices, only a GPU on UPHY, or PCIe and
+               GPU together in a bifurcated topology.
+
+               Following attributes appear under a kobject named mbwt_control on the
+               tegra-bpmp platform device (the same struct device as the driver
+               binds to), only when that device has an ACPI companion and BPMP
+               firmware reports support for both MBWT_GET and MBWT_SET via the MBWT
+               QUERY probe.
+
+               pcie_instance_id (RW):
+                       PCIe bandwidth group index: 0 = pcie0, 1 = pcie1, ..., 5 = pcie5.
+
+               vc_type (RW):
+                       Traffic type to cap for that group:
+                       0 = PCIe read
+                       1 = PCIe write
+                       2 = GPU UPHY read plus write (combined)
+
+               bandwidth (RW):
+                       Target bandwidth cap in GB/s for the pcie_instance_id and vc_type
+                       currently stored in the other two attributes. Intended range is
+                       1-110 GB/s; firmware validates the request (via MRQ MBWT_SET).
+
+                       When read, issues a MBWT_GET for that same pcie_instance_id and vc_type
+                       and returns the bandwidth value in GB/s returned by firmware.
+
+               Example:
+                       echo 0 > .../mbwt_control/pcie_instance_id
+                       echo 1 > .../mbwt_control/vc_type
+                       echo 100 > .../mbwt_control/bandwidth
+                       cat .../mbwt_control/bandwidth
+
+Users:         Customer tuning of PCIe and GPU UPHY bandwidth caps on
+               ACPI-based Tegra410 systems.

Documentation/ABI/testing/sysfs-bus-pci

@@ -174,6 +174,28 @@ Description:
 		similiar to writing 1 to their individual "reset" file, so use
 		with caution.
 
+What:		/sys/bus/pci/devices/.../cxl_reset
+Date:		February 2026
+Contact:	linux-cxl@vger.kernel.org
+Description:
+		This attribute is only visible when the device advertises
+		CXL Reset Capable in the CXL DVSEC Capability register
+		(CXL r3.2, section 8.1.3).
+
+		Writing 1 to this file triggers a CXL device reset which
+		affects CXL.cache and CXL.mem state on all CXL functions
+		(i.e. those not listed in the Non-CXL Function Map DVSEC,
+		section 8.1.4), not just CXL.io/PCIe state.  This is
+		separate from the standard PCI reset interface because CXL
+		Reset has different scope.
+
+		The reset will fail with -EBUSY if any CXL regions using this
+		device have drivers bound.  Active regions are torn down as
+		part of the reset sequence.
+
+		This attribute is registered by the CXL core when a CXL device
+		is discovered, independent of which driver binds the PCI device.
+
 What:		/sys/bus/pci/devices/.../vpd
 Date:		February 2008
 Contact:	Ben Hutchings <bwh@kernel.org>

Documentation/ABI/testing/sysfs-devices-system-cpu

@@ -327,6 +327,24 @@ Description:	Energy performance preference
 
 		This file is only present if the cppc-cpufreq driver is in use.
 
+What:		/sys/devices/system/cpu/cpuX/cpufreq/perf_limited
+Date:		February 2026
+Contact:	linux-pm@vger.kernel.org
+Description:	Performance Limited
+
+		Read to check if platform throttling (thermal/power/current
+		limits) caused delivered performance to fall below the
+		requested level. A non-zero value indicates throttling occurred.
+
+		Write the bitmask of bits to clear:
+
+		  - 0x1 = clear bit 0 (desired performance excursion)
+		  - 0x2 = clear bit 1 (minimum performance excursion)
+		  - 0x3 = clear both bits
+
+		The platform sets these bits; OSPM can only clear them.
+
+		This file is only present if the cppc-cpufreq driver is in use.
 
 What:		/sys/devices/system/cpu/cpu*/cache/index3/cache_disable_{0,1}
 Date:		August 2008

Documentation/admin-guide/kernel-parameters.txt

@@ -1052,6 +1052,19 @@ Kernel parameters
 			policy to use. This governor must be registered in the
 			kernel before the cpufreq driver probes.
 
+	cppc_cpufreq.auto_sel_mode=
+			[CPU_FREQ] Enable ACPI CPPC autonomous performance
+			selection. When enabled, hardware automatically adjusts
+			CPU frequency on all CPUs based on workload demands.
+			In Autonomous mode, Energy Performance Preference (EPP)
+			hints guide hardware toward performance (0x0) or energy
+			efficiency (0xff).
+			Requires ACPI CPPC autonomous selection register support.
+			Format: <bool>
+			Default: 0 (disabled)
+			0: use cpufreq governors
+			1: enable if supported by hardware
+
 	cpu_init_udelay=N
 			[X86,EARLY] Delay for N microsec between assert and de-assert
 			of APIC INIT to start processors.  This delay occurs
@@ -8541,7 +8554,8 @@ Kernel parameters
         workqueue.default_affinity_scope=
 			Select the default affinity scope to use for unbound
 			workqueues. Can be one of "cpu", "smt", "cache",
-			"numa" and "system". Default is "cache". For more
+			"cache_shard", "numa" and "system". Default is
+			"cache_shard". For more
 			information, see the Affinity Scopes section in
 			Documentation/core-api/workqueue.rst.
 

Documentation/admin-guide/perf/index.rst

@@ -24,7 +24,8 @@ Performance monitor support
    thunderx2-pmu
    alibaba_pmu
    dwc_pcie_pmu
-   nvidia-pmu
+   nvidia-tegra241-pmu
+   nvidia-tegra410-pmu
    meson-ddr-pmu
    cxl
    ampere_cspmu

Documentation/admin-guide/perf/nvidia-pmu.rst → Documentation/admin-guide/perf/nvidia-tegra241-pmu.rst

@@ -1,8 +1,8 @@
-=========================================================
-NVIDIA Tegra SoC Uncore Performance Monitoring Unit (PMU)
-=========================================================
+============================================================
+NVIDIA Tegra241 SoC Uncore Performance Monitoring Unit (PMU)
+============================================================
 
-The NVIDIA Tegra SoC includes various system PMUs to measure key performance
+The NVIDIA Tegra241 SoC includes various system PMUs to measure key performance
 metrics like memory bandwidth, latency, and utilization:
 
 * Scalable Coherency Fabric (SCF)