[build] Fall back to scalar zlib on CPUs without SIMD ports - #7062
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Xeonacid wants to merge 1 commit into
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[build] Fall back to scalar zlib on CPUs without SIMD ports#7062Xeonacid wants to merge 1 commit into
Xeonacid wants to merge 1 commit into
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build/BUILD.zlib overlays Chromium zlib with ISA-specific SIMD defines and deps, but several select()s only list x86_64 and aarch64. Bazel analysis then fails on any other CPU because those configurable attributes have no matching condition. The SIMD libraries already no-op when their ADLER32_SIMD_*, INFLATE_CHUNK_SIMD_*, CRC32_* and DEFLATE_SLIDE_HASH_* defines are unset: the corresponding C files are empty translation units or the generic zlib sources are used instead. Add "//conditions:default": [] so those selects resolve, and skip the x86/ARM-only CRC SIMD deps on other CPUs. This does not enable RISC-V Vector (or other) zlib optimizations; it only unblocks a portable scalar build.
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jasnell
approved these changes
Aug 20, 2026
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build/BUILD.zlib overlays Chromium zlib with ISA-specific SIMD defines and deps, but several select()s only list x86_64 and aarch64. Bazel analysis then fails on any other CPU because those configurable attributes have no matching condition.
The SIMD libraries already no-op when their ADLER32_SIMD_, INFLATE_CHUNK_SIMD_, CRC32_* and DEFLATE_SLIDE_HASH_* defines are unset: the corresponding C files are empty translation units or the generic zlib sources are used instead. Add "//conditions:default": [] so those selects resolve, and skip the x86/ARM-only CRC SIMD deps on other CPUs.
This does not enable RISC-V Vector (or other) zlib optimizations; it only unblocks a portable scalar build.