Ultra-Lightweight Polar SCL Decoder (L=8, N=1024) A high-efficiency hardware implementation of the Successive Cancellation List (SCL) decoder for Polar Codes.
🧩Features SCL decoding with list size L = 8 Efficient path management and pruning Support for frozen and non-frozen bit handling Log-Likelihood Ratio (LLR) based decoding Path Metric (PM) based sorting and selection Hardware-friendly architecture design
🚀 Key Advantages
Extreme Resource Efficiency
LUTs: ~950
FFs: ~480
Note: This is approximately 75% lower than typical academic or reference implementations which often exceed 4,000+ LUTs for
Virtual Path Management: Instead of high-latency physical data copying, this decoder uses a pointer-based Page-Mapping Table to handle path inheritance and splitting.
Zero-Overhead Path Switching: By mapping logical paths to physical memory pages, the system achieves path inheritance in a single clock cycle without the power consumption of global data movement.
Full Pipeline Synchronization: Optimized Processing Elements (PE) and a 16-input Bitonic Sorting network ensure consistent throughput.
🛠 Hardware Architecture The core innovation lies in the Copy-on-Write (COW) inspired memory management:
Page-Based PS Management: The 1024-bit Partial Sum (PS) sequence is managed as 32-bit "pages." The PS_stage register array tracks ownership, allowing multiple paths to "borrow" data from a common ancestor until a modification is required.
Bitonic Sorting Network: A hardware-parallel sorter that ranks 16 child paths by their Path Metrics (PM) every decision cycle, selecting the top 8 survivors.
Path-Independent Feedback: The LLR_stage and PS_stage logic ensures that even if physical paths are swapped , the recursive feedback remains mathematically correct.
📊 Implementation Results
🚀 Getting Started
- Generate input stimulus using the provided MATLAB scripts.
- Import the RTL files into your FPGA synthesis tool (Vivado, Quartus, etc.).
- Observe the COMPLETED flag for decoding status and retrieve the bitstream from the survivor path.
Future Improvements CRC-aided SCL decoding (CA-SCL)