Add Q2_K reordered MMVQ and ESIMD kernels - #27509
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Configure cmake build with -DGGML_SYCL_ESIMD=ON to enable. Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>
Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>
Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>
Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>
While not an issue in the current version, this will become an issue when additional QK ESIMD kernels are added (such as Q2_K). Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>
Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>
Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>
Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>
Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>
Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>
Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>
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@malsbat After it's merged, could you rebase this PR? Thank you! |
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This description is taken from the original PR, #26336. The only difference is that this fixes the build error that surfaced post-merge.
Overview
Continuing the work in #25942 to add the Q2_K kernel. In order to support the reordered ESIMD it is necessary to support reordered MMVQ as the MMVQ path is enabled in multi-token calls.
Measured tg improvement of 1.54x to 1.90x (depending on hardware) using Qwen35-27B-Q2_K_M.
Additional information
Note: all measurements were captured with #25741 applied locally as the parent PR does not include the newer upstream fix. This only affects pp numbers which are not the important part of this PR.
PVC performance
Baseline (unreordered MMVQ):
Reordered MMVQ
DMMV
ESIMD
Perplexity tests across wikitext, hellaswag, and winogrande showed no significant changes between unreordered MMVQ, reordered MMVQ, and ESIMD.
B70 for same 4 scenarios
Requirements