Skip to content
@icgrp

Penn Implementation of Computation Group

Research Group in Electrical and Systems Engineering and Computer and Information Science Departments at University of Pennsylvania

Popular repositories Loading

  1. hipr hipr Public

    Verilog 17 1

  2. pld2022 pld2022 Public

    C 16 1

  3. prflow_nested_dfx prflow_nested_dfx Public

    Fast and Flexible FPGA development using Hierarchical Partial Reconfiguration (FPT 2022)

    C 16 1

  4. bert bert Public

    Bitstream Embedded RAM Transfusion

    C 11 4

  5. ese532_code ese532_code Public

    C++ 10 18

  6. systolic_page_placer systolic_page_placer Public

    Hardware Accelerated FPGA Divide-and-Conquer Page Placement in Milliseconds (FPGA '26)

    Verilog 9

Repositories

Showing 10 of 25 repositories
  • ese532_handouts Public

    Course handouts for ESE532 at UPenn

    icgrp/ese532_handouts's past year of commit activity
    Shell 3 4 0 0 Updated Sep 4, 2026
  • systolic_page_placer Public

    Hardware Accelerated FPGA Divide-and-Conquer Page Placement in Milliseconds (FPGA '26)

    icgrp/systolic_page_placer's past year of commit activity
    Verilog 9 MIT 0 0 0 Updated Jul 17, 2026
  • rosetta_vitis_hls_only Public Forked from icgrp/rosetta_vitis
    icgrp/rosetta_vitis_hls_only's past year of commit activity
    Verilog 0 BSD-3-Clause 2 0 0 Updated Apr 12, 2026
  • ese532_code Public
    icgrp/ese532_code's past year of commit activity
    C++ 10 MIT 18 0 0 Updated Sep 28, 2025
  • sym_bft Public

    Butterfly Fat Tree NoC generator

    icgrp/sym_bft's past year of commit activity
    Verilog 0 0 0 0 Updated Jul 16, 2025
  • asym_bft Public

    Asymmetry in Butterfly Fat Tree FPGA NoC (FPT 2023)

    icgrp/asym_bft's past year of commit activity
    Verilog 2 0 0 0 Updated Jul 16, 2025
  • prflow_REFINE Public

    REFINE: Runtime Execution Feedback for INcremental Evolution on FPGA Designs (FPGA 2024)

    icgrp/prflow_REFINE's past year of commit activity
    C 6 0 0 0 Updated Nov 11, 2024
  • prflow_nested_dfx Public

    Fast and Flexible FPGA development using Hierarchical Partial Reconfiguration (FPT 2022)

    icgrp/prflow_nested_dfx's past year of commit activity
    C 16 1 0 0 Updated Mar 21, 2024
  • hipr Public
    icgrp/hipr's past year of commit activity
    Verilog 17 MIT 1 0 0 Updated Feb 3, 2023
  • rosetta_vitis Public
    icgrp/rosetta_vitis's past year of commit activity
    Verilog 7 BSD-3-Clause 2 0 0 Updated Nov 4, 2022
View all repositories

Top languages

Loading…

Most used topics

Loading…