docs: UltraEP on Intel XPU implementation task list - #98
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Phased engineering checklist covering XPU MoE A2A prerequisites, quota planner, XeLink/Intel SHMEM data plane, SGLang integration, and evaluation for UltraEP-style real-time expert load balancing. Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
Register the new page in docs.json and add a Related link on the Intel XPU hardware page. Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
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Summary
Adds an English, phased implementation task list for bringing UltraEP-style real-time MoE expert load balancing to Intel XPU in SGLang.
Contents
Also registers the page in Mintlify nav and links it from the existing XPU hardware page.
Notes
This is a planning checklist only — no runtime UltraEP/XPU code changes.
CI States
Latest PR Test (Base): ✅ Run #29984462210
Latest PR Test (Extra): ❌ Run #29984462087