[qcom-next] clk: qcom: sc7280: add SDCC2 apps clock support - #121
Merged
varada-qcom merged 1 commit intoAug 21, 2026
Merged
Conversation
Add the SDCC2 apps clock used by the external SD card port on sc7280. The frequency table covers the standard SD rates up to 202 MHz. The 202 MHz rate sources from GPLL9, which the earlier boot stages leave disabled. Vote GPLL9 on before programming the RCG whenever the selected frequency uses it, reusing clk_enable_gpll0() with a GPLL9 vote descriptor. Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
varada-qcom
approved these changes
Aug 20, 2026
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
2 participants
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Add the SDCC2 apps clock used by the external SD card port on sc7280. The frequency table covers the standard SD rates up to 202 MHz.
The 202 MHz rate sources from GPLL9, which the earlier boot stages leave disabled. Vote GPLL9 on before programming the RCG whenever the selected frequency uses it, reusing clk_enable_gpll0() with a GPLL9 vote descriptor.
Upstream link: https://lore.kernel.org/u-boot/20260820-sc7280-sdcc2-clk-v1-1-ef3227e4e49b@oss.qualcomm.com/