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fix(spi): correct target mode and bit-order handling - #125

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floitsch merged 1 commit into
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floitsch/spi-target-fixes
Aug 10, 2026
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fix(spi): correct target mode and bit-order handling#125
floitsch merged 1 commit into
floitsch/i2c-async-controllerfrom
floitsch/spi-target-fixes

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@floitsch

@floitsch floitsch commented Aug 6, 2026

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Stacked on #123.

This fixes target-mode issues found while bringing up asynchronous SPI target support in Toit:

  • Map the public target-facing TX/RX LSB-first flags to the corresponding peripheral register directions. Classic ESP32 has the opposite internal naming; newer chips use the target-facing direction directly.
  • On classic ESP32 without DMA, select the correct MOSI sampling edge in modes 1 and 3. Keep the existing DMA settings because that DMA engine depends on them.
  • On ESP32-S3 in mode 2, select separate DMA/non-DMA internal edges and make the first non-DMA output bit valid before the leading controller edge.

Validated with exhaustive two-device hardware tests on both classic ESP32 and ESP32-S3: modes 0 through 3, independent RX/TX bit order, supported DMA and non-DMA direction combinations, 50 kHz through 2 MHz, early termination, one-way transfers, and sizes through 4092 bytes. The classic mode 1/3 issue corresponds to Espressif IDFGH-6011.

@floitsch
floitsch force-pushed the floitsch/spi-target-fixes branch from d3be94e to a8a6c03 Compare August 6, 2026 21:37
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floitsch force-pushed the floitsch/i2c-async-controller branch from 83186a9 to 66288ee Compare August 10, 2026 12:42
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floitsch force-pushed the floitsch/spi-target-fixes branch from a8a6c03 to 6aa66fa Compare August 10, 2026 12:42
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floitsch force-pushed the floitsch/i2c-async-controller branch from 66288ee to c545f1e Compare August 10, 2026 14:28
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floitsch force-pushed the floitsch/spi-target-fixes branch 2 times, most recently from 33e8d49 to a759c0a Compare August 10, 2026 16:02
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floitsch force-pushed the floitsch/i2c-async-controller branch from c545f1e to 0471101 Compare August 10, 2026 16:02
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floitsch force-pushed the floitsch/spi-target-fixes branch from a759c0a to c96237a Compare August 10, 2026 17:58
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floitsch force-pushed the floitsch/i2c-async-controller branch from 0471101 to 87256d4 Compare August 10, 2026 17:58
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floitsch force-pushed the floitsch/spi-target-fixes branch 2 times, most recently from c574357 to ee96ee8 Compare August 10, 2026 21:39
An error occurred while trying to automatically change base from floitsch/i2c-async-controller to floitsch/i2c-register-provider August 10, 2026 21:44
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floitsch force-pushed the floitsch/spi-target-fixes branch from ee96ee8 to 0e068a0 Compare August 10, 2026 21:48
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floitsch force-pushed the floitsch/i2c-async-controller branch from a8fda3b to 44c3afe Compare August 10, 2026 21:48
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coderabbitai Bot commented Aug 10, 2026

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Review finished.

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coderabbitai Bot commented Aug 10, 2026

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Review Change Stack

Walkthrough

Changes

SPI slave corrections

Layer / File(s) Summary
Target-specific bit-order mapping
components/esp_driver_spi/src/gpspi/spi_slave.c
ESP32 targets now map RX and TX LSB-first flags inversely. Other targets retain the existing mapping.
DMA-aware slave clock edges
components/hal/esp32/include/hal/spi_ll.h, components/hal/esp32s3/include/hal/spi_ll.h
Slave modes 1 and 3 on ESP32, and mode 2 on ESP32-S3, now select clock edges based on DMA usage. ESP32-S3 also enables rsck_data_out for non-DMA mode 2.

Estimated code review effort: 3 (Moderate) | ~20 minutes

🚥 Pre-merge checks | ✅ 5
✅ Passed checks (5 passed)
Check name Status Explanation
Docstring Coverage ✅ Passed No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.
Linked Issues check ✅ Passed Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check ✅ Passed Check skipped because no linked issues were found for this pull request.
Title check ✅ Passed The title clearly summarizes the primary SPI target-mode and bit-order fixes in the changeset.
Description check ✅ Passed The description accurately explains the SPI fixes, target-specific behavior, and validation performed.
✨ Finishing Touches
📝 Generate docstrings
  • Create stacked PR
  • Commit on current branch
🧪 Generate unit tests (beta)
  • Create PR with unit tests
  • Commit unit tests in branch floitsch/spi-target-fixes

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@floitsch
floitsch marked this pull request as ready for review August 10, 2026 22:35
@floitsch
floitsch merged commit 4a8004d into floitsch/i2c-async-controller Aug 10, 2026
3 checks passed
@floitsch
floitsch deleted the floitsch/spi-target-fixes branch August 10, 2026 22:52
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