RISC-V (Nios V) SoC para placas genéricas Cyclone IV (EP4CE6, EP4CE10, EP4CE15) com controlador SDRAM, bootloader via SPI e módulo PWM (com Testbench) em VHDL
-
Updated
Aug 19, 2026 - SystemVerilog
RISC-V (Nios V) SoC para placas genéricas Cyclone IV (EP4CE6, EP4CE10, EP4CE15) com controlador SDRAM, bootloader via SPI e módulo PWM (com Testbench) em VHDL
Collection of laboratory projects developed with Quartus Prime Lite and VHDL for the Digital Systems Design course, focusing on digital logic, FPGA design, simulation, and hardware modeling.
Add a description, image, and links to the quartus-prime-lite topic page so that developers can more easily learn about it.
To associate your repository with the quartus-prime-lite topic, visit your repo's landing page and select "manage topics."