register-map

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An interactive web tool for decoding and encoding hardware register values

[stable] A zero-cost, type-safe DSL for MMIO and volatile register mapping in Rust.

rust embedded system-programming no-std volatile mmio register-map peripheral-access

Compatibility gate for CMSIS-SVD register maps. Detect breaking register-map changes in CI before they reach firmware.

python embedded hardware firmware embedded-systems cmsis svd registers cmsis-svd github-actions register-map

Access device's physical memory (configuration registers).

AXI4-Lite slave parametrizable IP core in SystemVerilog. ARM AMBA AXI compliant, with YAML to SV+C register-map generator.

arm embedded fpga verilog systemverilog yosys verilator axi amba ip-core axi4-lite register-map

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