🎓 Computer Engineering Graduate | FPGA & ASIC Design | Physical Design |

I'm a Computer Engineering graduate focused on FPGA and ASIC design, with a particular interest in Physical Design. My work bridges hardware architecture and silicon implementation — from RTL design and hardware-software co-design to the physical design flow that turns logic into working chips.

Currently focused on:

• Deepening my expertise in ASIC Physical Design (floorplanning, placement, routing, timing closure)
• Hardware accelerator design for AI and edge computing workloads
• Contributing to open-source hardware projects

*Final Year Project — *

A user-configurable FP16 CNN accelerator for real-time YOLOv8n object detection, implemented on a Xilinx Zynq UltraScale+ (ZCU104). Features a reconfigurable multi-engine architecture with dynamic depth scaling and an on-chip dynamic retiling pipeline for efficient inter-layer data transformation.

Status: Completed (Final Year Project — Defended)

→ View Repository

Hardware-Software Co-Designed RISC-V SoC

A hardware-software co-designed RV32I System-on-Chip featuring a custom 3x3 convolution accelerator for real-time edge detection.

→ View Repository

An intelligent assistant revolutionizing hardware design with AI

Key Features:

• AI-Powered Code Generation – Generate synthesizable Verilog code from natural language descriptions
• Smart Debugging – Analyze and fix Verilog code with detailed issue explanations
• Educational Explanations – Master complex Verilog concepts with beginner-friendly guides
• Interactive Chat Interface – Modern chatbot experience powered by Gemini AI
• Real-time Validation – Instant syntax checking and best practice verification

Tech Stack: FastAPI • Python • Gemini API • HTML5 • CSS3 • JavaScript • CodeMirror

→ Explore VerilogAI

Hardware & Design

• Verilog, SystemVerilog, FPGA (Xilinx/Intel), Digital Logic Design
• ASIC Design, Physical Design (floorplanning, placement & routing, timing closure)
• Xilinx Vivado, Hardware Simulation & Synthesis

AI & Deep Learning

• Model Acceleration, Real-time Object Detection, YOLO
• TensorFlow, PyTorch

Software Development

• Python, C/C++, MATLAB, Java
• FastAPI, Full-stack Web Development, REST APIs

Tools & Platforms

• Git, Docker, VS Code, GitHub

Interests: 🏏 Cricket • 📖 Reading • 🔬 Exploring Emerging Tech

I'm always excited to collaborate on FPGA/ASIC design projects, discuss physical design challenges, or explore opportunities.

• LinkedIn – Professional updates & insights
• X (Twitter) – Latest thoughts & discoveries

"From RTL to silicon — designing hardware that's efficient, scalable, and built to last."